The present invention relates to a DC-DC converter and a method for controlling a DC-DC converter.
A battery is installed as a driving power source in many portable electronic devices. Due to battery discharge, the output voltage of a battery decreases during use of an electronic device. A direct current voltage conversion circuit (DC-DC converter) for converting the output voltage of the battery to voltage having a constant value is arranged in the electronic device. When the electronic device incorporates a chargeable battery, or a secondary battery, the battery is charged by the power supplied from an AC adapter connected to the electronic device. The power supplied from the AC adapter is also used to operate the electronic device. Therefore, the DC-DC converter is supplied with power from both the battery and the AC adapter. The voltage supplied from the battery to the DC-DC converter differs from the voltage supplied from the AC adapter to the DC-DC converter. Thus, it is required that a DC-DC converter be stably operable over a wide input voltage range.
Referring to FIG. 1, a conventional DC-DC converter 10 is of a voltage control mode type DC-DC converter. A control unit 11 is a step-down type switching regulator for controlling the activation and inactivation of output transistors T1 and T2 to supply a load circuit (not shown) with output voltage Vout obtained by lowering input voltage Vin.
The output transistors T1 and T2 are N-channel MOS transistors. The output transistor T1 includes a drain supplied with the input voltage Vin and a source connected to the drain of the output transistor T2. The source of the output transistor T2 is grounded. A drive signal DH is provided to the gate of the output transistor T1 from the control unit 11, and a drive signal DL is provided to the gate of the output transistor T2 from the control unit 11. A first terminal of a choke coil L1 is connected to a node between the output transistors T1 and T2, and a second terminal of the choke coil L1 is connected to a smoothing capacitor C1. The second terminal of the choke coil L1 is also connected to the load circuit.
A feedback signal FB having the voltage at the load side terminal of the choke coil L1, that is, the output voltage Vout, is provided to the control unit 11. An input resistor R1 and a ground resistor R2 divide the voltage of the feed back signal FB and generate divided voltage V1. The divided voltage V1 is provided to an inverting input terminal of an error amplifier 12. Reference voltage Vr of a reference power supply e1 is supplied to a non-inverting input terminal of the error amplifier 12. A feedback capacitor C2 and a feedback resistor R3 are connected in series between the output terminal and inverting input terminal of the error amplifier 12 to prevent oscillation of the error amplifier 12. The error amplifier 12 amplifies the voltage difference between the divided voltage V1 and the reference voltage Vr and generates an error signal Vop having the amplified voltage.
The error signal Vop is provided to a non-inverting input terminal of a PWM comparator 13. A triangular wave signal SS having a constant frequency is provided from a triangular wave signal oscillator 14 to an inverting input terminal of the PWM comparator 13. The PWM comparator 13 outputs the drive signal DH with an H level and the drive signal DL with an L level when the voltage of the error signal Vop is higher than the voltage of the triangular wave signal SS. Further, the PWM comparator 13 outputs the drive signal DH with an L level and the drive signal DL with an H level when the voltage of the error signal Vop is lower than the voltage of the triangular wave signal SS. The drive signal DH and the drive signal DL are provided to the gates of the output transistors T1 and T2, respectively. The output transistor T1 is driven (activated and inactivated) in response to the drive signal DH. The output transistor T2 is driven (activated and inactivated) in response to the drive signal DL.
When the output transistor T1 is activated in response to the drive signal DH with an H level and the output transistor T2 is inactivated in response to the drive signal DL with an L level, the output voltage Vout of the DC-DC converter 10 increases. The output voltage Vout is smoothed by the smoothing capacitor C1. The energy stored in the choke coil L1 is released when the output transistor T1 is inactivated in response to the drive signal DH with an L level. The output voltage Vout decreases as the energy stored in the choke coil L1 decreases. When the divided voltage V1 becomes lower than the reference voltage Vr due to the decrease of the output voltage Vout, the drive signal DH with an H level is output to activate the output transistor T1.
As shown in FIG. 2, when the output voltage Vout becomes low, the voltage of the error signal Vop increases, and the pulse width of the drive signal DH of H level increases. Further, the activation time of the output transistor T1 becomes long. When the output voltage Vout becomes high, the voltage of the error signal Vop decreases and the pulse width of the drive signal DH of H level decreases. Further, the activation time of the output transistor T1 becomes short. Such operations control the two output transistors T1 and T2 so that the divided voltage V1 and the reference voltage Vr become the same to keep the output voltage Vout constant.
In the conventional DC-DC converter 10, the input resistor R1, the ground resistor R2, the feedback resistor R3 and the feedback capacitor C2 determine the gain of the error amplifier 12. The gain of the error amplifier 12 is set so that the voltage of the error signal Vop is within the amplitude range of the triangular wave signal SS. For instance, when the minimum voltage and the maximum voltage of the triangular signal SS are respectively 1 V and 2 V, the voltage of the error signal Vop must be a value within the amplitude range of the triangular wave signal SS, that is, between the maximum voltage and the minimum voltage. The output voltage Vout becomes unstable if the voltage of the error signal Vop is outside the amplitude range of the triangular wave signal SS.
A technique for controlling the gain of the error amplifier based on the output voltage Vout has been proposed (Japanese Laid-Open Patent Publication No. 05-304771, Japanese Laid-Open Patent Publication No. 11-187647, and Japanese Laid-Open Patent Publication No. 2002-112535).